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00075 #define BOARD_NAME_STKM8 "stkm8"
00076
00077 #ifndef BOARD_STK_M8_H
00078 #define BOARD_STK_M8_H
00079
00080 #define BOARD_TYPE (STK500_MEGA8)
00081 #define BOARD_NAME BOARD_NAME_STKM8
00082
00083
00084 #ifndef MAX_FRAME_SIZE
00085 # define MAX_FRAME_SIZE (127)
00086 #endif
00087
00088 #ifndef DEFAULT_SPI_RATE
00089 # define DEFAULT_SPI_RATE (SPI_RATE_1_2)
00090 #endif
00091
00092
00093 #define CPU_TYPE (CPU_M8)
00094 #define RADIO_TYPE (RADIO_AT86RF230B)
00095
00096
00097
00098 #define DDR_TRX_RESET DDRD
00099 #define PORT_TRX_RESET PORTD
00100 #define MASK_TRX_RESET (_BV(PD6))
00101 #define TRX_RESET_INIT() DDR_TRX_RESET |= MASK_TRX_RESET
00102 #define TRX_RESET_HIGH() PORT_TRX_RESET |= MASK_TRX_RESET
00103 #define TRX_RESET_LOW() PORT_TRX_RESET &= ~MASK_TRX_RESET
00104
00105 #define PORT_TRX_SLPTR PORTD
00106 #define DDR_TRX_SLPTR DDRD
00107 #define MASK_TRX_SLPTR (_BV(PD7))
00108
00109 #define TRX_SLPTR_INIT() DDR_TRX_SLPTR |= MASK_TRX_SLPTR
00110 #define TRX_SLPTR_HIGH() PORT_TRX_SLPTR |= MASK_TRX_SLPTR
00111 #define TRX_SLPTR_LOW() PORT_TRX_SLPTR &= ~MASK_TRX_SLPTR
00112
00113
00114
00115 # define TRX_IRQ_vect TIMER1_CAPT_vect
00121 # define TRX_IRQ_INIT() do{\
00122 \
00123 TCCR1B |= (_BV(ICNC1) | _BV(ICES1));\
00124 TIFR = _BV(ICF1);\
00125 } while(0)
00126
00128 #define DI_TRX_IRQ() {TIMSK &= ~_BV(TICIE1);}
00129
00131 #define EI_TRX_IRQ() {TIMSK |= _BV(TICIE1);}
00132
00134 #define TRX_TSTAMP_REG TCNT1
00135
00136 #define DDR_SPI (DDRB)
00137 #define PORT_SPI (PORTB)
00138
00139 #define SPI_MOSI _BV(PB3)
00140 #define SPI_MISO _BV(PB4)
00141 #define SPI_SCK _BV(PB5)
00142 #define SPI_SS _BV(PB2)
00143
00144 #define SPI_DATA_REG SPDR
00145
00146 static inline void SPI_INIT(uint8_t spirate)
00147 {
00148
00149 PORT_SPI |= SPI_SCK | SPI_SS;
00150 DDR_SPI |= SPI_MOSI | SPI_SCK | SPI_SS;
00151 DDR_SPI &= ~SPI_MISO;
00152
00153 SPCR = (_BV(SPE) | _BV(MSTR));
00154
00155 SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
00156 SPSR &= ~_BV(SPI2X);
00157
00158 SPCR |= (spirate & 0x03);
00159 SPSR |= ((spirate >> 2) & 0x01);
00160
00161 }
00162
00163 #define SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00164 #define SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg
00165 #define SPI_WAITFOR() do { while((SPSR & _BV(SPIF)) == 0);} while(0)
00166
00167
00168 #define LED_PORT PORTC
00169 #define LED_DDR DDRC
00170 #define LED_MASK (0x03)
00171 #define LED_SHIFT (0)
00172 #define LED_NUMBER (2)
00173 #define LEDS_INVERSE (1)
00174
00175
00176 #define PORT_KEY PORTD
00177 #define PIN_KEY PIND
00178 #define DDR_KEY DDRD
00179 #define MASK_KEY (0x0c)
00180 #define SHIFT_KEY (2)
00181 #define INVERSE_KEYS (1)
00182 #define PULLUP_KEYS (1)
00183
00184
00185 #define HIF_TYPE HIF_UART_0
00186
00187
00188
00194 #define HWTMR_PRESCALE (1)
00195 #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
00196 #define HWTIMER_TICK_NB (0xFFFFUL)
00197 #define HWTIMER_REG (TCNT1)
00198 #define TIMER_TICK (HWTIMER_TICK_NB * HWTIMER_TICK)
00199 #define TIMER_POOL_SIZE (4)
00200 #define TIMER_INIT() \
00201 do{ \
00202 TCCR1B |= (_BV(CS10)); \
00203 TIMSK |= _BV(TOIE1); \
00204 }while(0)
00205 # define TIMER_IRQ_vect TIMER1_OVF_vect
00206
00207
00208
00209 #ifndef TUNED_OSCCAL
00210 # define TUNED_OSCCAL (0xbf)
00211 #endif
00212 #endif