Defines

board_ravrf.h File Reference

Definition of Atmel Raven Development Kit, AT86RF230 Radio Adapter with Atmega1284. More...

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Defines

#define DDR_SPI   (DDRB)
#define DDR_TRX_RESET   DDRB
#define DDR_TRX_SLPTR   DDRB
#define DEFAULT_SPI_RATE   (SPI_RATE_1_2)
#define DI_TRX_IRQ()   {TIMSK1 &= (~(TRX_IRQ));}
#define EI_TRX_IRQ()   {TIMSK1 |= (TRX_IRQ);}
#define HIF_TYPE   HIF_UART_0
#define HWTIMER_REG   (TCNT1)
#define HWTIMER_TICK   ((1.0*HWTMR_PRESCALE)/F_CPU)
#define HWTIMER_TICK_NB   (0xFFFFUL)
#define HWTMR_PRESCALE   (1)
#define MASK_TRX_RESET   (_BV(PB1))
#define MASK_TRX_SLPTR   (_BV(PB3))
#define NO_KEYS   (1)
#define NO_LEDS   (1)
#define PORT_SPI   (PORTB)
#define PORT_TRX_RESET   PORTB
#define PORT_TRX_SLPTR   PORTB
#define RADIO_TYPE   (RADIO_AT86RF230A)
#define SPI_DATA_REG   SPDR
#define SPI_MISO   _BV(PB6)
#define SPI_MOSI   _BV(PB5)
#define SPI_SCK   _BV(PB7)
#define SPI_SELN_HIGH()   PORT_SPI |= SPI_SS; SREG = sreg
#define SPI_SELN_LOW()   uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
#define SPI_SS   _BV(PB4)
#define SPI_TYPE   SPI_TYPE_SPI
#define SPI_WAITFOR()   do { while((SPSR & _BV(SPIF)) == 0);} while(0)
#define TIMER_INIT()
#define TIMER_IRQ_vect   TIMER1_OVF_vect
#define TIMER_POOL_SIZE   (4)
#define TIMER_TICK   (HWTIMER_TICK_NB * HWTIMER_TICK)
#define TRX_IRQ   _BV(ICIE1)
#define TRX_IRQ_INIT()
#define TRX_IRQ_vect   TIMER1_CAPT_vect
#define TRX_TSTAMP_REG   ICR1

Detailed Description

Definition of Atmel Raven Development Kit, AT86RF230 Radio Adapter with Atmega1284.

The wiring of the radio and the Atmega1284 is shown below:

     AVR          AT86RF230
     ---            ---------
     PB3      -->   SLPTR
     XTAL1    <--   MCLK
     PD6/ICP  <--   IRQ
     PB1      -->   RSTN
     PB4      -->   /SEL
     PB5      -->   MOSI
     PB6      <--   MISO
     PB7      -->   SCLK
     PB0      -->   TST
    LEDs: None
    KEYs: None
Fuses/Locks?????:
     LF: 0xe2 - 8MHz internal RC Osc.
     HF: 0x11 - without boot loader
     HF: 0x10 - with boot loader
     EF: 0xff
     LOCK: 0xef - protection of boot section
Original Fuses/Locks
     LF: 0x62
     HF: 0x18
     EF: 0xff
     LOCK: 0xff
Bootloader:
    Start at byte=0x1e000, address=0xf000, size = 4096 instructions/ 8192 bytes
Build Options

Define Documentation

#define DDR_SPI   (DDRB)

DDR register for SPI port

#define DDR_TRX_RESET   DDRB

DDR register for RESET pin

#define DDR_TRX_SLPTR   DDRB

PORT register for SLP_TR pin

#define DI_TRX_IRQ (  )     {TIMSK1 &= (~(TRX_IRQ));}

rising edge triggers INT... disable TRX interrupt

#define EI_TRX_IRQ (  )     {TIMSK1 |= (TRX_IRQ);}

enable TRX interrupt

#define HIF_TYPE   HIF_UART_0

Type of the host interface.

#define MASK_TRX_RESET   (_BV(PB1))

PIN mask for RESET pin

#define MASK_TRX_SLPTR   (_BV(PB3))

PIN mask for SLP_TR pin

#define NO_KEYS   (1)

if defined, no KEYS are connected

#define NO_LEDS   (1)

if defined, no LEDs are connected

#define PORT_SPI   (PORTB)

PORT register for SPI port

#define PORT_TRX_RESET   PORTB

PORT register for RESET pin

#define PORT_TRX_SLPTR   PORTB

DDR register for SLP_TR pin

#define RADIO_TYPE   (RADIO_AT86RF230A)

used radiio (see const.h)

#define SPI_DATA_REG   SPDR

abstraction for SPI data register

#define SPI_MISO   _BV(PB6)

PIN mask for MISO pin

#define SPI_MOSI   _BV(PB5)

PIN mask for MOSI pin

#define SPI_SCK   _BV(PB7)

PIN mask for SCK pin

#define SPI_SELN_HIGH (  )     PORT_SPI |= SPI_SS; SREG = sreg

set SS line to high level

#define SPI_SELN_LOW (  )     uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS

set SS line to low level

#define SPI_SS   _BV(PB4)

PIN mask for SS pin

#define SPI_WAITFOR (  )     do { while((SPSR & _BV(SPIF)) == 0);} while(0)

wait until SPI transfer is ready

#define TIMER_INIT (  ) 
Value:
do{ \
        TCCR1B |= (_BV(CS10)); \
        TIMSK1 |= _BV(TOIE1); \
    }while(0)
#define TIMER_IRQ_vect   TIMER1_OVF_vect

symbolic name of the timer interrupt routine that is called

#define TRX_IRQ   _BV(ICIE1)

interrupt mask for GICR

#define TRX_IRQ_INIT (  ) 
Value:
do{\
                            TCCR1B |= (_BV(ICNC1) | _BV(ICES1));\
                            TIFR1 = _BV(ICF1);\
                          } while(0)

configuration of interrupt handling

#define TRX_IRQ_vect   TIMER1_CAPT_vect

interrupt vector name

#define TRX_TSTAMP_REG   ICR1

timestamp register for RX_START event


This documentation for µracoli was generated on Tue Apr 9 2013 by  doxygen 1.7.1