base_zdma1281.h

/* Copyright (c) 2008 Axel Wachtler
   All rights reserved.

   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
   are met:

   * Redistributions of source code must retain the above copyright
     notice, this list of conditions and the following disclaimer.
   * Redistributions in binary form must reproduce the above copyright
     notice, this list of conditions and the following disclaimer in the
     documentation and/or other materials provided with the distribution.
   * Neither the name of the authors nor the names of its contributors
     may be used to endorse or promote products derived from this software
     without specific prior written permission.

   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   POSSIBILITY OF SUCH DAMAGE. */

/* $Id: base__zdma1281_8h_source.html,v 1.1.1.4 2013/04/09 21:11:37 awachtler Exp $ */

/* Basic configuration for Meshnetics ZigBits ZDM-A1281-(P1,A2,E1,Amp)
 * For wiring details see http://www.mikrocontroller.net/articles/Meshnetics_Zigbee
 */

#ifndef BASE_ZDMA1281_H
#define BASE_ZDMA1281_H

#ifndef PB0
# define PB0 (0)
# define PB1 (1)
# define PB2 (2)
# define PB3 (3)
# define PB4 (4)
# define PB5 (5)
# define PB6 (6)
# define PB7 (7)
# define PD4 (4)
#endif

#ifndef DEFAULT_SPI_RATE
# define DEFAULT_SPI_RATE  (SPI_RATE_1_2)
#endif

/*=== Hardware Components ============================================*/

#ifndef RADIO_TYPE
#define RADIO_TYPE (RADIO_AT86RF230)    
#endif
/*=== TRX pin access macros ==========================================*/

#define DDR_TRX_RESET   DDRA          
#define PORT_TRX_RESET  PORTA        
#define MASK_TRX_RESET  (_BV(7))          
#define TRX_RESET_INIT() DDR_TRX_RESET |= MASK_TRX_RESET

#define TRX_RESET_HIGH() PORT_TRX_RESET |= MASK_TRX_RESET

#define TRX_RESET_LOW()  PORT_TRX_RESET &= ~MASK_TRX_RESET

#define PORT_TRX_SLPTR  PORTB

#define DDR_TRX_SLPTR   DDRB

#define MASK_TRX_SLPTR  (_BV(PB4))

#define TRX_SLPTR_INIT() DDR_TRX_SLPTR |= MASK_TRX_SLPTR

#define TRX_SLPTR_HIGH() PORT_TRX_SLPTR |= MASK_TRX_SLPTR

#define TRX_SLPTR_LOW()  PORT_TRX_SLPTR &= ~MASK_TRX_SLPTR


/*=== IRQ access macros ==============================================*/
# define TRX_IRQ         _BV(INT5)
# define TRX_IRQ_vect    INT5_vect

# define TRX_IRQ_INIT()  do{\
                            EICRB  |= (_BV(ISC51)|_BV(ISC50));\
                            EIFR =TRX_IRQ; \
                          } while(0)

#define DI_TRX_IRQ() {EIMSK &= ~TRX_IRQ;}

#define EI_TRX_IRQ() {EIMSK |= TRX_IRQ;}

#define TRX_TSTAMP_REG TCNT1

/*=== SPI access macros ==============================================*/
#define DDR_SPI  (DDRB)   
#define PORT_SPI (PORTB)  
#define SPI_MOSI _BV(PB2)  
#define SPI_MISO _BV(PB3)  
#define SPI_SCK  _BV(PB1)  
#define SPI_SS   _BV(PB0)  
#define SPI_DATA_REG SPDR  
static inline void SPI_INIT(uint8_t spirate)
{
    /* first configure SPI Port, then SPCR */
    PORT_SPI |= SPI_SCK | SPI_SS;
    DDR_SPI  |= SPI_MOSI | SPI_SCK | SPI_SS;
    DDR_SPI  &= ~SPI_MISO;

    SPCR = (_BV(SPE) | _BV(MSTR));

    SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
    SPSR &= ~_BV(SPI2X);

    SPCR |= (spirate & 0x03);
    SPSR |= ((spirate >> 2) & 0x01);

}

#define SPI_SELN_LOW()       uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS

#define SPI_SELN_HIGH()      PORT_SPI |= SPI_SS; SREG = sreg

#define SPI_WAITFOR()        do { while((SPSR & _BV(SPIF)) == 0);} while(0)


#endif
/* EOF */